Conventionally, the underlying metal of solder bumps is formed by a barrier metal thin film directly formed on the electrode (normally aluminum) and formed at substantially the same size, and a metal thin film formed directly on the barrier metal thin film at substantially the same size and with good wettability with solder. The same construction is used, even when an interconnect layer is formed on a semiconductor chip.
In recent years, with the more compact design of electronic instruments, there has been an active move toward directly connecting a semiconductor device having solder bumps to the substrate, to provide even more compact and lightweight electronic instruments. In view of this, there is an increasing demand for a reliable connection of the semiconductor chip to a substrate with a greatly differing coefficient of thermal expansion. For example, as disclosed in Japanese Patent Publication No. 7-105586, a construction has been proposed whereby the underlying metal of substantially the same size as the solder bumps is formed as a multilayer metal layer providing stress relief.
However, for the actual connection of the semiconductor device, the are problems of the process becoming complicated or additional materials cost being incurred, because for example the mounting is on a substrate restricted to having a coefficient of thermal expansion close to that of the semiconductor chip, or the semiconductor chip is limited in size, or after the connection an additional step of injecting resin is required.
The present invention solves the above problems, and has as its object the provision of a semiconductor device and method of manufacture thereof, a circuit board and an electronic instrument such that without requiring selection of the substrate material or additional steps after connection, connection reliability can be assured, direct connection to a substrate is possible, and further an electronic instrument can be made more compact and lightweight.